uM-FPU 3.1 Float.Point Coprocessor

Introduction The new uM-FPU V3.1 floating point coprocessor has the speed and features required to support today's advanced microcontroller applications.The uM-FPU V3.1 chip easily interfaces to virtually any microcontroller using an SPI™ or I2C™ interface. Many microcontrollers used in embedded systems lack floating point support, but a wide range of sensors available today require additional computations or data transformation to provide accurate results. Software math libraries often use large amounts of memory on microcontrollers, particularly as more complex library functions are used. The uM-FPU V3.1 chip offloads this overhead, and provides a comprehensive set of floating point operations, including advanced functions such as FFT, matrix operations and NMEA sentence parsing. Advanced operations and fast execution allows the uM-FPU V3.1 chip to outperform comparable software math libraries. It also provides Flash memory and EEPROM for storing user-defined functions and data, and 128 32-bit registers for floating point and integer data. Development support is provided by the uM-FPU V3 IDE which takes traditional math expressions and automatically produces uM-FPU code targeted for one of the many microcontrollers and compilers supported. The IDE also interacts with the built-in debugger on the uM-FPU V3.1 chip to assist in debugging and testing uM-FPU code. For a printed summary of uM-FPU V3.1 features, see uM-FPU V3.1 Brochure. For a more detailed list of uM-FPU V3.1 features, and changes from V3.0, see uM-FPU V3.1 Release Notes .